The Vlsi Seminar Series

Force-directed placers are an attractive approach for placement and are of interest for several reasons. Large standard cell and mixed-size problems are handled seemlessly by such methods. Furthermore, force-directed placers provide continuous trajectories for cell locations and therefore seem quite amenable to timingand congestion-driven placement, physical re-synthesis, and so forth. Unfortunately, research literature offers little information pertaining to the actual implementation details of a force-directed placer; i.e., only high-level algorithmic descriptions are provided and no open-sourced implementations are available that facilitate a “self-discovery” of this technique. Finally, few comparisons to other placers (e.g., academic min-cut tools) are available, making it difficult to judge the capability of force-directed methods to produce high-quality placements. This talk will present some of the implementation details of an open-source, force-directed placer developed at the University of Waterloo. Problems (and accompanying solutions) discovered while developing the placer will be presented. Methods to improve the quality of placements (measured in terms of wire length) produced by force-directed methods will also be presented. Comparisions with other leading academic tools will be provided using both standard cell and mixed-size problems. Other currently-active research into these methods will also be presented.